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Bøker av K. C. Chang

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  • - The Path to Political Authority in Ancient China
    av K. C. Chang
    347,-

    Leading scholar K. C. Chang challenges long-standing conceptions of the rise of political authority in ancient China. This strikingly illustrated book is a persuasive demonstration of the importance of an interdisciplinary approach to the study of early civilizations.

  • av K. C. Chang
    1 535,-

    Combines VHDL and synthesis in an easy-to-follow step-by-step sequence. This approach addresses common mistakes and hard-to-understand concepts in a way that eases learning. Digital Design and Modeling with VHDL and Synthesis introduces VHDL with closely related practical design examples, simulation waveforms, and schematics so you can better understand their correspondence and relationship. This book is the result of the K.C. Chang's extensive experience in both design and teaching. Many of the design techniques and design considerations, illustrated throughout the chapters, are examples of real designs.

  • - An Integrated Approach
    av K. C. Chang
    1 604,-

    K.C. Chang presents an integrated approach to digital design principles, processes, and implementations to help the reader design increasingly complex systems within shorter design cycles. Chang introduces digital design concepts, VHDL coding, VHDL simulation, synthesis commands, and strategies together. Digital Systems Design with VHDL and Synthesis focuses on the ultimate product of the design cycle: the implementation of a digital design. Many of the design techniques and considerations illustrated in the text are examples of actual real-world designs. Unique features of the book include the following: VHDL code explained line by line to capture the logic behind the design concepts Simulation waveforms, synthesized schematics, and results are shown, verified, and analyzed VHDL code is synthesized and commands and strategies are discussed Variations on the design techniques and common mistakes are addressed Demonstrated standard cell, gate array, and FPGA three design processes, each with a complete design case study Test bench, post-layout verification, and test vector generation processes are illustrated

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